Publications

Peer-reviewed papers and conference proceedings, 2007–2026.

Citation history (snapshot)

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1. Modeling and fabrication of cladded Ge quantum dot gate Si MOSFETs exhibiting 3-state behavior.

   Year2011

   AuthorsJain FC, Gogna M, Alamoody F, et al.
2. Fabrication of novel GeOx-cladded Ge quantum dots and quantum dot gate nonvolatile memory using GeOx-Ge QD's.

   Year2011

   AuthorsGogna M.
3. Fabrication and simulation of II-VI tunnel insulators for InGaAs nonvolatile memory devices.

   Year2010 PubUS Workshop on the Physics and Chemistry of II-VI Materials (ARO Research Area 9)

   AuthorsSuarez E, Chan P, Gogna M, et al.
4. 3-state behavior of quantum dot gate FETs with lattice matched insulator.

   Year2009

   AuthorsKarmakar S, Gogna M, Suarez E, et al.
5. Application of quantum dot gate nonvolatile memory (QDNVM) in image segmentation.

   Year2016 PubSignal, Image and Video Processing 10(3):551-558

   AuthorsKarmakar S, Gogna M, Jain FC.
6. Fabrication and simulation of InGaAs field-effect transistors with II–VI tunneling insulators.

   Year2015 PubJ Electron Mater 44(9):3064-3068

   AuthorsSuarez E, Chan P, Gogna M, Ayers JE, Heller E, Jain F.
7. Three-state quantum dot gate field-effect transistor in silicon-on-insulator.

   Year2015 PubIET Circuits, Devices & Systems 9(2):111-118

   AuthorsKarmakar S, Gogna M, Suarez E, Jain FC.
8. Quantum dot channel (QDC) field effect transistors (FETs) using II-VI barrier layers.

   Year2011 PubII-VI Workshop

   AuthorsJain F, Karmakar S, Suarez E, Gogna M, Chandy J.
9. Three-state quantum dot gate FETs using ZnS-ZnMgS lattice-matched gate insulator on silicon.

   Year2011 PubJ Electron Mater 40(8):1749-1756

   AuthorsKarmakar S, Gogna M, Suarez E, Jain FC.
10. II-VI tunnel layers to improve threshold voltages in bulk and radiation hardened non-volatile memory quantum dot gate FETs.

    Year2012 PubConnecticut Symposium on Microelectronics & Optoelectronics

    AuthorsJain F, Suarez E, Chan P, Gogna M, Al-Amoody F, Karmakar S, Ayers JE.
11. Nanoelectronic devices for defense and security conference.

    Year2009 PubFt. Lauderdale, FL

    AuthorsGogna M, Karmakar S, Al-Amoody F, Papadimitrakopoulos F, Jain F.
12. Fabrication and simulation of an indium gallium arsenide quantum-dot-gate field effect transistor (QDC-FET) with ZnMgS as a tunnel gate insulator.

    Year2013 PubJ Electron Mater 42(11):3259-3266

    AuthorsJain F, Chan PY, Gogna M, Suarez E, Al-Amoody F, Karmakar S, Miller BI, Heller EK, Ayers JE.
13. Self-assembled germanium oxide cladded germanium quantum dot gate nonvolatile memory.

    Year2009

    AuthorsGogna M, Karmakar S, Al-Amoody F, Papadimitrakopoulos F, Jain F.
14. Fabrication of novel GeOx-cladded Ge quantum dots and quantum dot gate nonvolatile memory using GeOx-Ge quantum dots.

    Year2012

    AuthorsGogna M.
15. ZnS/ZnMgSeTe/ZnS II-VI energy barrier for InGaAs substrates.

    Year2014 PubInt J High Speed Electron Syst 23(01):1450013

    AuthorsSuarez E, Chan P, Gogna M, Ayers JE, Heller E, Jain F.
16. Modeling and fabrication of cladded Ge quantum dot gate silicon MOSFETs exhibiting 3-state behavior.

    Year2008 PubMRS Online Proceedings Library Archive 1108

    AuthorsJain FC, Gogna M, Alamoody F, et al.
17. Fabrication of novel germanium oxide-cladded germanium quantum dots and quantum dot gate nonvolatile memory using germanium oxide-germanium QD's.

    Year2011

    AuthorsGogna M.
18. 3-state behavior in quantum dot gate FETs.

    Year2009 Pub2009 International Semiconductor Device Research Symposium, pp.1-2

    AuthorsJain F, Karmakar S, Alamoody F, et al.
19. Indium gallium arsenide based non-volatile memory devices with site-specific self-assembled germanium quantum dot gate.

    Year2010 PubMRS Online Proceedings Library Archive 1250

    AuthorsChan P, Gogna M, Suarez E, et al.
20. Fabrication and simulation of an indium gallium arsenide quantum-dot-gate field-effect transistor (QDG-FET) with ZnMgS as a tunnel gate insulator.

    Year2013 PubJ Electron Mater 42(11):3259-3266

    AuthorsChan P, Gogna M, Suarez E, et al.
21. Quantum dot (QD) gate Si-FETs with self-assembled GeOx cladded germanium quantum dots.

    Year2009 PubNanotech 2009 Conference 1:163-165

    AuthorsGogna M, Al-Amoody F, Karmakar S, Papadimitrakopoulos F, Jain F.
22. ZnS-ZnMgS-ZnS lattice-matched gate insulator as an alternative for silicon dioxide on silicon in quantum dot gate FETs (QDGFETs).

    Year2012 PubJ Electron Mater 41(10):2663-2670

    AuthorsKarmakar S, Suarez E, Gogna M, Jain F.
23. Indium gallium arsenide quantum dot gate field-effect transistor using II–VI tunnel insulators showing three-state behavior.

    Year2012 PubJ Electron Mater 41(10):2810-2815

    AuthorsChan P, Suarez E, Gogna M, et al.
24. Nonvolatile memory effect in indium gallium arsenide-based Metal–Oxide–Semiconductor devices using II–VI tunnel insulators.

    Year2011 PubJ Electron Mater 40(8):1685-1688

    AuthorsChan P, Gogna M, Suarez E, et al.
25. Improved device structure of quantum dot gate FET to obtain more stable intermediate state.

    Year2012 PubElectron Lett 48(24):1556-1557

    AuthorsKarmakar S, Gogna M, Jain FC.
26. Fabrication and circuit modeling of NMOS inverter based on quantum dot gate field-effect transistors.

    Year2012 PubJ Electron Mater 41(8):2184-2192

    AuthorsKarmakar S, Chandy JA, Gogna M, Jain FC.
27. Nonvolatile silicon memory using GeOx-cladded Ge quantum dots self-assembled on SiO2 and lattice-matched II–VI tunnel insulator.

    Year2011 PubJ Electron Mater 40(8):1769-1774

    AuthorsGogna M, Suarez E, Chan P, Al-Amoody F, Karmakar S, Jain F.
28. Quantum dot channel (QDC) field-effect transistors (FETs) using II–VI barrier layers.

    Year2012 PubJ Electron Mater 41(10):2775-2784

    AuthorsJain F, Karmakar S, Chan P, et al.
29. Nonvolatile memories using quantum dot (QD) floating gates assembled on II–VI tunnel insulators.

    Year2010 PubJ Electron Mater 39(7):903-907

    AuthorsSuarez E, Gogna M, Al-Amoody F, et al.
30. Spatial wavefunction-switched (SWS) InGaAs FETs with II–VI gate insulators.

    Year2011 PubJ Electron Mater 40(8):1717-1726

    AuthorsJain FC, Miller B, Suarez E, et al.
31. Novel quantum dot gate FETs and nonvolatile memories using lattice-matched II–VI gate insulators.

    Year2009 PubJ Electron Mater 38(8):1574-1578

    AuthorsJain FC, Suarez E, Gogna M, et al.